VLIW
Very Long Instruction Word — a processor design that packs multiple parallel operations into one wide instruction word, pushing instruction scheduling from runtime hardware to compile-time software. Invented by Josh Fisher at Yale in the early 1980s.
VLIW (Very Long Instruction Word) is a processor design approach in which a single very wide instruction word encodes multiple independent operations that the processor issues to parallel execution units in lockstep. The architecture was formalized by Josh Fisher at Yale University in the early 1980s, building on his earlier work on trace scheduling — a compiler technique that reorders instructions across basic blocks to expose parallelism. VLIW's defining trade-off is to push scheduling work from hardware to the compiler. A superscalar processor uses dedicated silicon to decode instructions, track dependencies, and issue them out of order at runtime; a VLIW processor expects the compiler to have already arranged operations into bundles that the hardware can execute as-is. This makes the chip smaller, cooler, and conceptually simpler, but transfers enormous complexity to the toolchain and leaves the processor unable to adapt to runtime behavior the compiler could not predict. Early commercial VLIW machines came from Multiflow (founded by Fisher in 1984) and Cydrome, both of which produced minisupercomputers in the late 1980s and both of which went out of business within a few years. The most famous general-purpose attempt was Intel and HP's EPIC (Computing) architecture in Itanium, which extended VLIW with predication and speculation. VLIW has proven much more durable in domains with predictable, statically analyzable workloads — digital signal processors from Texas Instruments and Analog Devices, media processors like NXP TriMedia, and earlier ATI TeraScale GPUs.