LUTs: The Configurable Logic Blocks Inside FPGAs
Look-Up Tables are the fundamental building blocks of FPGAs — small SRAM blocks that can implement any boolean function by storing its truth table.
A Look-Up Table (LUT) is the fundamental configurable logic element in FPGAs Explained: How Field Programmable Gate Arrays Work and When to Use Them. An n-input LUT is a small SRAM block storing a 2ⁿ-entry truth table, capable of implementing **any** boolean function of n inputs by pre-loading the output values during FPGA configuration. A 4-input LUT stores 16 entries (2⁴); a 6-input LUT stores 64 entries (2⁶). During operation, input signals select which stored output to present — effectively computing any arbitrary logic function in constant time (one LUT delay). Modern FPGAs use 6-input LUTs as the standard element. Multiple LUTs combine with flip-flops and carry chains to form Configurable Logic Blocks (CLBs) — the tiles that make up the FPGA fabric. LUT count is a primary measure of FPGA capacity and resource utilization. **Why LUTs matter**: They're what makes FPGAs "field programmable." Unlike fixed logic gates in ASICs, LUTs can be reconfigured to implement any digital function, enabling hardware designs to be modified after manufacturing.